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3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and Circuits
Bhoj, Ajay N., Joshi, Rajiv V., Jha, Niraj K.Volume:
21
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2012.2227848
Date:
November, 2013
File:
PDF, 2.13 MB
english, 2013