A 7 bit, 3.75 ps Resolution Two-Step Time-to-Digital...

IEEE Journal of Solid-State Circuits 2013 / 04 Vol. 48; Iss. 4

A 7 bit, 3.75 ps Resolution Two-Step Time-to-Digital Converter in 65 nm CMOS Using Pulse-Train Time Amplifier

Kim, KwangSeok, Kim, Young-Hwa, Yu, Wonsik, Cho, SeongHwan
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Volume:
48
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2013.2237996
Date:
April, 2013
File:
PDF, 2.00 MB
english, 2013
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