The design of a SRAM-based field-programmable gate...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 1999 / 09 Vol. 7; Iss. 3

The design of a SRAM-based field-programmable gate array-Part II: Circuit design and layout

Chow, P., Soon Ong Seo,, Rose, J., Chung, K., Paez-Monzon, G., Rahardja, I.
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
7
Language:
english
Pages:
10
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/92.784093
Date:
September, 1999
File:
PDF, 516 KB
english, 1999
Conversion to is in progress
Conversion to is failed