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A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a $+$27.1 dBm WCDMA CMOS Power Amplifier
Kousai, Shouhei, Onizuka, Kohei, Yamaguchi, Takashi, Kuriyama, Yasuhiko, Nagaoka, MasamiVolume:
47
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2012.2217833
Date:
December, 2012
File:
PDF, 1.86 MB
english, 2012