![](/img/cover-not-exists.png)
Design, Modeling, and Hardware Correlation of a 3.2Gb/s/Pair Memory Channel
Beyene, W.T., Yuan, X., Cheng, N., Shi, H.Volume:
27
Language:
english
Journal:
IEEE Transactions on Advanced Packaging
DOI:
10.1109/TADVP.2004.825463
Date:
February, 2004
File:
PDF, 1.12 MB
english, 2004