Analysis, fast algorithm, and VLSI architecture design for...

IEEE Transactions on Circuits and Systems for Video Technology 2005 / 03 Vol. 15; Iss. 3

Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder

Yu-Wen Huang,, Bing-Yu Hsieh,, Tung-Chien Chen,, Liang-Gee Chen,
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Volume:
15
Language:
english
Journal:
IEEE Transactions on Circuits and Systems for Video Technology
DOI:
10.1109/TCSVT.2004.842620
Date:
March, 2005
File:
PDF, 2.77 MB
english, 2005
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