IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing
2008 / 12 Vol. 55; Iss. 12
![](/img/cover-not-exists.png)
An Efficient VLSI Architecture for Normal I/O Order Pipeline FFT Design
Chang, Yun-NanVolume:
55
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2008.2008074
Date:
December, 2008
File:
PDF, 466 KB
english, 2008