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[IEEE 2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Chennai, India (2011.07.4-2011.07.6)] 2011 IEEE Computer Society Annual Symposium on VLSI - Design of a Low Power, High Speed Complementary Input Folded Regulated Cascode OTA for a Parallel Pipeline ADC
Hati, Manas Kumar, Bhattacharyya, Tarun K.Year:
2011
Language:
english
DOI:
10.1109/ISVLSI.2011.9
File:
PDF, 400 KB
english, 2011