Fixed latency on-chip interconnect for hardware spiking...

Parallel Computing 2013 / 9 Vol. 39; Iss. 9

Fixed latency on-chip interconnect for hardware spiking neural network architectures

Pande, Sandeep, Morgan, Fearghal, Smit, Gerard, Bruintjes, Tom, Rutgers, Jochem, McGinley, Brian, Cawley, Seamus, Harkin, Jim, McDaid, Liam
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Volume:
39
Language:
english
Journal:
Parallel Computing
DOI:
10.1016/j.parco.2013.04.010
Date:
September, 2013
File:
PDF, 1.11 MB
english, 2013
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