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[IEEE 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Banff, AB, Canada (2006.10.2-2006.10.4)] 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit
Chang, Hoseok, Cho, Junho, Sung, WonyongYear:
2006
Language:
english
DOI:
10.1109/SIPS.2006.352558
File:
PDF, 7.33 MB
english, 2006