A $1/2 \times {\hbox {VDD}}$ to $3 \times {\hbox {VDD}}$ Bidirectional I/O Buffer With a Dynamic Gate Bias Generator
Chua-Chin Wang,, Chia-Hao Hsu,, Yi-Cheng Liu,Volume:
57
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2009.2036054
Date:
July, 2010
File:
PDF, 6.50 MB
english, 2010