![](/img/cover-not-exists.png)
A new architecture for hardware implementation of a 16 × 16 discrete cosine transform
HSU, CHAU-YUN, WU, HERB-DEEVolume:
72
Language:
english
Journal:
International Journal of Electronics
DOI:
10.1080/00207219208925600
Date:
April, 1992
File:
PDF, 306 KB
english, 1992