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Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories
Zhao, Weisheng, Moreau, Mathieu, Deng, Erya, Zhang, Yue, Portal, Jean-Michel, Klein, Jacques-Olivier, Bocquet, Marc, Aziza, Hassen, Deleruyelle, Damien, Muller, Christophe, Querlioz, Damien, Ben RomdhVolume:
61
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2013.2278332
Date:
February, 2014
File:
PDF, 2.95 MB
english, 2014