A 10-bit 100-MS/s Dual-Channel Pipelined ADC Using Dynamic...

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing 2011 / 05 Vol. 58; Iss. 5

A 10-bit 100-MS/s Dual-Channel Pipelined ADC Using Dynamic Memory Effect Cancellation Technique

Shin, Chang-Seob, Ahn, Gil-Cho
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Volume:
58
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2011.2149130
Date:
May, 2011
File:
PDF, 255 KB
english, 2011
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