Scalable Hierarchical Network-on-Chip Architecture for...

IEEE Transactions on Parallel and Distributed Systems 2013 / 12 Vol. 24; Iss. 12

Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations

Carrillo, Snaider, Harkin, Jim, McDaid, Liam J., Morgan, Fearghal, Pande, Sandeep, Cawley, Seamus, McGinley, Brian
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Volume:
24
Language:
english
Journal:
IEEE Transactions on Parallel and Distributed Systems
DOI:
10.1109/TPDS.2012.289
Date:
December, 2013
File:
PDF, 463 KB
english, 2013
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