Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style
Foroutan, Vahid, Taheri, MohammadReza, Navi, Keivan, Mazreah, Arash AziziVolume:
47
Language:
english
Journal:
Integration, the VLSI Journal
DOI:
10.1016/j.vlsi.2013.05.001
Date:
January, 2014
File:
PDF, 5.02 MB
english, 2014