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[IEEE 2008 International Symposium on parallel Architectures, Algorighms and Networks I-SPAN - Sydney, Australia (2008.05.7-2008.05.9)] 2008 International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008) - Three-Dimensional Layout of On-Chip Tree-Based Networks
Matsutani, Hiroki, Koibuchi, Michihiro, Hsu, D. Frank, Amano, HideharuYear:
2008
Language:
english
DOI:
10.1109/I-SPAN.2008.39
File:
PDF, 454 KB
english, 2008