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[IEEE ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - San Francisco, CA, USA (Feb. 6-10, 2005)] ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - A chip-package hybrid DLL loop and clock distribution network for low-jitter clock delivery
Daehyun Chung,, Chunghyun Ryu,, Hyungsoo Kim,, Choonheung Lee,, Jaedong Kim,, Jinyoung Kim,, Kicheol Bae,, Jiheon Yu,, Seungjae Lee,, Hoijun Yoo,, Joungho Kim,Year:
2005
Language:
english
DOI:
10.1109/ISSCC.2005.1494095
File:
PDF, 1.64 MB
english, 2005