PSP: Parallel sub-pipelined architecture for high throughput AES on FPGA and ASIC
Rahimunnisa, K., Karthigaikumar, P., Christy, N. Anitha, Kumar, S. Suresh, Jayakumar, J.Volume:
3
Language:
english
Journal:
Central European Journal of Computer Science
DOI:
10.2478/s13537-013-0112-2
Date:
December, 2013
File:
PDF, 898 KB
english, 2013