System-Level ESD Protection Design Using On-Wafer...

IEEE Transactions on Device and Materials Reliability 2014 / 03 Vol. 14; Iss. 1

System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations

Scholz, Mirko, Chen, Shih-Hung, Thijs, Steven, Linten, Dimitri, Hellings, Geert, Vandersteen, Gerd, Sawada, Masanori, Groeseneken, Guido
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Volume:
14
Language:
english
Journal:
IEEE Transactions on Device and Materials Reliability
DOI:
10.1109/TDMR.2012.2201720
Date:
March, 2014
File:
PDF, 520 KB
english, 2014
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