[Integrated Circuits and Systems] Wafer Level 3-D ICs Process Technology ||
Tan, Chuan Seng, Gutmann, Ronald J., Reif, L. RafaelVolume:
10.1007/97
Year:
2008
Language:
english
DOI:
10.1007/978-0-387-76534-1
File:
PDF, 14.21 MB
english, 2008