Efficient output ESD protection for 0.5-μm high-speed CMOS...

Microelectronics Reliability 1996 Vol. 36; Iss. 11-12

Efficient output ESD protection for 0.5-μm high-speed CMOS SRAM IC with well-coupled technique

Ming-Dou Ker, Chau-Neng Wu
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Volume:
36
Year:
1996
Language:
english
Pages:
4
DOI:
10.1016/0026-2714(96)00185-0
File:
PDF, 287 KB
english, 1996
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