A new hardware-efficient architecture for programmable FIR...

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing 1996 / Sept. Vol. 43; Iss. 9

A new hardware-efficient architecture for programmable FIR filters

Hwan-Rei Lee,, Chein-Wei Jen,, Chi-Min Liu,
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Volume:
43
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
DOI:
10.1109/82.536760
Date:
January, 1996
File:
PDF, 906 KB
english, 1996
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