Fixed-outline floorplanning: enabling hierarchical design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2003 / 12 Vol. 11; Iss. 6

Fixed-outline floorplanning: enabling hierarchical design

Adya, S.N., Markov, I.L.
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Volume:
11
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2003.817546
Date:
December, 2003
File:
PDF, 1.28 MB
english, 2003
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