![](/img/cover-not-exists.png)
[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Bit Cost Scalable Technology with Punch and Plug Process for Ultra High Density Flash Memory
Tanaka, H., Kido, M., Yahashi, K., Oomura, M., Katsumata, R., Kito, M., Fukuzumi, Y., Sato, M., Nagata, Y., Matsuoka, Y., Iwata, Y., Aochi, H., Nitayama, A.Year:
2007
Language:
english
DOI:
10.1109/VLSIT.2007.4339708
File:
PDF, 1.08 MB
english, 2007