Minimization of CNTFET Ternary Combinational Circuits Using...

Minimization of CNTFET Ternary Combinational Circuits Using Negation of Literals Technique

V. Sridevi, T. Jayanthy
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Volume:
39
Language:
english
DOI:
10.1007/s13369-014-1147-y
Date:
June, 2014
File:
PDF, 3.24 MB
english, 2014
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