Layout-Based Refined NPSF Model for DRAM Characterization...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2014 / 6 Vol. 22; Iss. 6

Layout-Based Refined NPSF Model for DRAM Characterization and Testing

Sfikas, Yiorgos, Tsiatouhas, Yiorgos E., Hamdioui, Said
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Volume:
22
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2013.2266281
Date:
June, 2014
File:
PDF, 2.19 MB
english, 2014
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