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[IEEE 2014 International Symposium on Next-Generation Electronics (ISNE) - Kwei-Shan Tao-Yuan, Taiwan (2014.5.7-2014.5.10)] 2014 International Symposium on Next-Generation Electronics (ISNE) - Simultaneous data path synthesis and clock skew scheduling for leakage and glitch power minimization
Liao, Hao-Wei, Huang, Shih-Hsu, Yeh, Hua-Hsin, Tu, Wen-PinYear:
2014
Language:
english
DOI:
10.1109/ISNE.2014.6839356
File:
PDF, 313 KB
english, 2014