Bitline Techniques With Dual Dynamic Nodes for Low-Power...

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications 2013 / 04 Vol. 60; Iss. 4

Bitline Techniques With Dual Dynamic Nodes for Low-Power Register Files

Singh, Rahul, Hong, Gi-Moon, Kim, Suhwan
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Volume:
60
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2012.2220457
Date:
April, 2013
File:
PDF, 1.67 MB
english, 2013
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