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A 9 bit, 1.12 ps Resolution 2.5 b/Stage Pipelined Time-to-Digital Converter in 65 nm CMOS Using Time-Register
Kim, KwangSeok, Yu, WonSik, Cho, SeongHwanVolume:
49
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2013.2297412
Date:
April, 2014
File:
PDF, 2.15 MB
english, 2014