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A method of designing avalanche transistor trigger circuits
Chaplin, G.B.B., Owens, A.R.Volume:
106
Language:
english
Journal:
Proceedings of the IEE - Part B: Electronic and Communication Engineering
DOI:
10.1049/pi-b-2.1959.0149
Date:
May, 1959
File:
PDF, 1.14 MB
english, 1959