[Japan Soc. Appl. Phys 1995 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (6-8 June 1995)] 1995 Symposium on VLSI Technology. Digest of Technical Papers - A 6.93-μm/sup 2/ n-gate full CMOS SRAM cell technology with high-performance 1.8-V dual-gate CMOS for peripheral circuits

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