[IEEE 2006 21st IEEE International Symposium on Defect and...

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[IEEE 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Arlington, VA, USA (2006.10.4-2006.10.4)] 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Implicit Critical PDF Test Generation with Maximal Test Efficiency

Christou, Kyriakos, Michael, Maria, Tragoudas, Spyros
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Year:
2006
Language:
english
DOI:
10.1109/DFT.2006.34
File:
PDF, 217 KB
english, 2006
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