[Japan Soc. Appl. Phys 2003 Symposium on VLSI Circuits....

[Japan Soc. Appl. Phys 2003 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (12-14 June 2003)] 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) - Built-in duty cycle corrector using coded phase blending scheme for DDR/DDR2 synchronous DRAM Application

Kyu-Hyoun Kim,, Geun-Hee Cho,, Jung-Bae Lee,, Soo-In Cho,

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Year:

2003

Language:

english

DOI:

10.1109/vlsic.2003.1221229

File:

PDF, 154 KB

english, 2003

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