[IEEE 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Liberec, Czech Republic (2009.04.15-2009.04.17)] 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - A symbolic RTL synthesis for LUT-based FPGAs
Deniziak, Stanislaw, Wisniewski, MariuszYear:
2009
Language:
english
DOI:
10.1109/ddecs.2009.5012107
File:
PDF, 699 KB
english, 2009