[IEEE 2012 25th International Conference on VLSI Design - Hyderabad, India (2012.01.7-2012.01.11)] 2012 25th International Conference on VLSI Design - Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis
Mitra, Sajib Kumar, Chowdhury, Ahsan RajaYear:
2012
Language:
english
DOI:
10.1109/vlsid.2012.93
File:
PDF, 294 KB
english, 2012