Area-delay-power-efficient architecture for folded...

Area-delay-power-efficient architecture for folded two-dimensional discrete wavelet transform by multiple lifting computation

Mohanty, Basant Kumar, Meher, Pramod K.
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Volume:
8
Language:
english
Journal:
IET Image Processing
DOI:
10.1049/iet-ipr.2012.0661
Date:
June, 2014
File:
PDF, 704 KB
english, 2014
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