[IEEE 2014 IEEE 32nd VLSI Test Symposium (VTS) - Napa, CA,...

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[IEEE 2014 IEEE 32nd VLSI Test Symposium (VTS) - Napa, CA, USA (2014.04.13-2014.04.17)] 2014 IEEE 32nd VLSI Test Symposium (VTS) - Phase-locked loop design with SPO detection and charge pump trimming for reference spur suppression

Hsiao, Sen-Wen, Chen, Chung-Chun, Caplan, Randy, Galloway, Jeff, Gray, Blake, Chatterjee, Abhijit
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Year:
2014
Language:
english
DOI:
10.1109/vts.2014.6818785
File:
PDF, 5.93 MB
english, 2014
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