[IEEE 1993 Symposium on VLSI Circuits - Kyoto, Japan (1997.06.14-1997.06.14)] Symposium on VLSI Circuits - A new staggered virtual ground array architecture implemented in a 4Mb CMOS EPROM
All,, Nguyen,, Sani,, Shubat,, Hu,, Me,, Kazarounian,, Eltan,Year:
1989
Language:
english
DOI:
10.1109/VLSIC.1989.1037477
File:
PDF, 120 KB
english, 1989