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[IEEE Comput. Soc 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - San Francisco, CA, USA (24-26 Oct. 2001)] Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Design of a totally self checking signature analysis checker for finite state machines
Ottavi, M., Cardarilli, G.C., Cellitti, D., Pontarelli, S., Re, M., Salsano, A.Year:
2001
Language:
english
DOI:
10.1109/DFTVS.2001.966794
File:
PDF, 868 KB
english, 2001