[Japan Soc. Appl. Phys 1999 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (14-16 June 1999)] 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325) - Novel integration technology with capacitor over metal (COM) by using self-aligned dual damascene (SADD) process for 0.15 μm stand-alone and embedded DRAMs
Won Suk Yang,, Yeong Kwan Kim,, Soo Ho Shin,, Won Seok Lee,, Kyu Hyun Lee,, Hong Sik Jeong,, Jong Ho Lee,, Tae Young Chung,, Heung Soo Park,, Sang In Lee,, Kinam Kim,, Moon Yong Lee,, ChanYear:
1999
Language:
english
DOI:
10.1109/VLSIT.1999.799316
File:
PDF, 353 KB
english, 1999