Addressable failure site test structures (AFS-TS) for CMOS...

IEEE Transactions on Semiconductor Manufacturing 2001 / Nov. Vol. 14; Iss. 4

Addressable failure site test structures (AFS-TS) for CMOS processes: Design guidelines, fault simulation, and implementation

Doong, K.Y.-Y., Sunnys Hsieh,, Sheng-Che Lin,, Binson Shen,, Jye-Yen Cheng,, Ding-Ming Kwai,, Hess, C., Weiland, L.H., Hsu, C.C.H.
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Volume:
14
Language:
english
Journal:
IEEE Transactions on Semiconductor Manufacturing
DOI:
10.1109/66.964321
Date:
January, 2001
File:
PDF, 1.22 MB
english, 2001
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