Design-for-testability and fault-tolerant techniques for...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2005 / 06 Vol. 13; Iss. 6

Design-for-testability and fault-tolerant techniques for FFT processors

Shyue-Kung Lu,, Jen-Sheng Shih,, Shih-Chang Huang,
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Volume:
13
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2005.844306
Date:
June, 2005
File:
PDF, 729 KB
english, 2005
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