Two ESD Detection Circuits for 3$\times$ VDD-Tolerant I/O...

IEEE Transactions on Device and Materials Reliability 2013 / 03 Vol. 13; Iss. 1

Two ESD Detection Circuits for 3$\times$ VDD-Tolerant I/O Buffer in Low-Voltage CMOS Processes With Low Leakage Currents

Liu, Hongxia, Yang, Zhaonian, Zhuo, Qingqing
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Volume:
13
Language:
english
Journal:
IEEE Transactions on Device and Materials Reliability
DOI:
10.1109/tdmr.2012.2218606
Date:
March, 2013
File:
PDF, 494 KB
english, 2013
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