[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Power-aware 65 nm node CMOS technology using variable V/sub DD/ and back-bias control with reliability consideration for back-bias mode

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