Gate Workfunction Engineering in Bulk FinFETs for Sub-50-nm...

IEEE Electron Device Letters 2007 / 02 Vol. 28; Iss. 2

Gate Workfunction Engineering in Bulk FinFETs for Sub-50-nm DRAM Cell Transistors

Park, Ki-Heung, Lee, Jong-Ho
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
28
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/led.2006.889235
Date:
February, 2007
File:
PDF, 243 KB
english, 2007
Conversion to is in progress
Conversion to is failed