[IEEE 2013 21st Telecommunications Forum Telfor (TELFOR) - Belgrade, Serbia (2013.11.26-2013.11.28)] 2013 21st Telecommunications Forum Telfor (TELFOR) - Symbolic analysis of faulty logic circuits in the presence of correlated gate failures
Brkic, Srdjan, Ivanis, Predrag, Djordjevic, Goran, Vasic, BaneYear:
2013
Language:
english
DOI:
10.1109/telfor.2013.6716246
File:
PDF, 728 KB
english, 2013