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[IEEE 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Austin, TX, USA (2012.10.3-2012.10.5)] 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Dual-edge-triggered FF with timing error detection capability
Namba, Kazuteru, Katagiri, Takashi, Ito, HideoYear:
2012
Language:
english
DOI:
10.1109/dft.2012.6378222
File:
PDF, 134 KB
english, 2012