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[IEEE IEEE 2005 International Interconnect Technology Conference - Burlingame, CA, USA (6-8 June 2005)] Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005. - Focus error reduction by photo-resist planarization in via-first dual damascene process

Matsui, Y., Minamihaba, G., Tateyama, Y., Takahata, K., Shigeta, A., Nishioka, T., Yano, H., Hayasaka, N.
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Year:
2005
Language:
english
DOI:
10.1109/iitc.2005.1499963
File:
PDF, 608 KB
english, 2005
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