Modeling and Understanding of External Latchup in CMOS...

IEEE Transactions on Device and Materials Reliability 2011 / 09 Vol. 11; Iss. 3

Modeling and Understanding of External Latchup in CMOS Technologies—Part II: Minority Carrier Collection Efficiency

Farbiz, Farzan, Rosenbaum, Elyse
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Volume:
11
Language:
english
Journal:
IEEE Transactions on Device and Materials Reliability
DOI:
10.1109/tdmr.2011.2159505
Date:
September, 2011
File:
PDF, 808 KB
english, 2011
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